- ็ตๆฑ ็ฎก็ไปปๅก๏ผไพๅฆๅ ็ตๅ็ต้่ฎก้ใ
- ็จๆท็้ข็ปไปถ๏ผไพๅฆ้ชๅ ็ฏใๆพ็คบๅฑๅ RGB ่ฒๅฝฉ็ฉบ้ดใ
- ็ไธ็ณป็ป (SoC) ๅบ็ก่ฎพๆฝๅ ็ด ๏ผไพๅฆๆถ้ใๆจกๆฐ่ฝฌๆขๅจ (ADC) ๅไธ็ต (PON) ๅ่ฝใ
XBL_CFG ้ๅๅจ XBL ไธญ่ฟ่ก่ชๅฎไนใ้
็ฝฎ PMIC XBL DT ๅฑๆงๅฏ็กฎไฟๆไฝณๆง่ฝๅ้ๆใๆจๅฏไปฅไฝฟ็จ DT ๆกๆถๆง่ก่ฟไบ่ชๅฎไนใ
Linux ่ฎพๅค็ PMIC DTSI ๆไปถไฝไบ boot_images/boot/Settings/Soc/<Chipset>/Core/PMIC/pm.dtsi, access.dtsiใ
่กจ๏ผPMIC DT ๅฑๆง
| ๅฑๆงๅ็งฐ | ๅฑๆง่ฏดๆ | ๆฐๆฎ็ฑปๅ | ๅฏ่ฝ็ๅผ/ๅๅผ่ๅด | ่ฎพๅค่กไธบ |
|---|---|---|---|---|
s2-kpdpwr | ๅฏ็จ PMIC ็ตๆบ้ฎๅผ่ๅคไฝ้ ็ฝฎใ | Boolean | โข PM_TRUEโข PM_FALSE | ๅฝ็ตๆบ้ฎๆไธๆ็ปญ s1-ms ๅ s2-ms ไธญๆๅฎ็ๆถ้ฟๆถ๏ผ็ตๆบ้ฎ่ขซ้
็ฝฎไธบๅคไฝๆๅ
ณ้ญ่ฎพๅคใๅฏนไบ PM_FALSE๏ผไฝฟ็จ็กฌไปถ้ป่ฎค่ฎพ็ฝฎใ |
reset-type | ้ๆฉๅคไฝ็ฑปๅใ | UINT8 | โข PM_WARM_RESETโข PM_HARD_RESETโข PM_SHUTDOWN | โข WARM_RESET๏ผๅดฉๆบ่ฝฌๅจๆถ้ โข HARD_RESET๏ผ้ๅฏ โข SHUTDOWN๏ผๅ ณๆบ |
s1-ms | ๆ้ฎๆ็ปญๆถ้ด๏ผไปๆฏๆ็ๅผไธญ้ๆฉ๏ผใ | UINT32 | 0, 32, 56, 80, 128, 184, 272, 408, 608, 904, 1352, 2048, 3072, 4480, 6720, 10256 | KPDPWR_N_RESET_S1_TIMER๏ผๅไฝไธบๆฏซ็ง |
s2-ms | ๆ้ฎๆ็ปญๆถ้ด๏ผไปๆฏๆ็ๅผไธญ้ๆฉ๏ผใ | UINT32 | 0, 10, 50, 100, 250, 500, 1000, 2000 | KPDPWR_N_RESET_S2_TIMER๏ผๅไฝไธบๆฏซ็ง |
s2-kpdpwr-resin | ้ ็ฝฎ PMIC ็ตๆบ้ฎๅ resin ้ฎ็ปๅใ | Boolean | โข PM_TRUEโข PM_FALSE | ็ตๆบ้ฎๅ resin ้ฎ็ปๅๅ้็จ s1-ms ๅ s2-ms ไธญ็ๆ็ปญๆถ้ดใๅฏนไบ PM_FALSE๏ผไฝฟ็จ็กฌไปถ้ป่ฎค่ฎพ็ฝฎใ |
reset-type | ้ๆฉๅคไฝ็ฑปๅใ | UINT32 | โข PM_WARM_RESETโข PM_HARD_RESETโข PM_SHUTDOWN | WARM_RESET๏ผๅดฉๆบ่ฝฌๅจ๏ผHARD_RESET๏ผ้ๅฏ๏ผSHUTDOWN๏ผๅ ณๆบ |
s1-ms | ๆ้ฎๆ็ปญๆถ้ด๏ผ้ๆฉๆฏๆ็ๅผ๏ผใ | UINT32 | 0, 32, 56, 80, 128, 184, 272, 408, 608, 904, 1352, 2048, 3072, 4480, 6720, 10256 | RESIN_AND_KPDPWR_RESET_S1_TIMER๏ผๅไฝไธบๆฏซ็ง |
s2-ms | ๆ้ฎๆ็ปญๆถ้ด๏ผ้ๆฉๆฏๆ็ๅผ๏ผใ | UINT32 | 0, 10, 50, 100, 250, 500, 1000, 2000 | RESIN_AND_KPDPWR_RESET_S2_TIMER๏ผๅไฝไธบๆฏซ็ง |
s2-resin | ้ ็ฝฎ็จไฝ้ณ้ๅๅฐ้ฎ็ resin ้ฎๅผ่ใ | Boolean | โข PM_TRUEโข PM_FALSE | ๅฝ resin ้ฎๆไธๆ็ปญ s1-ms / s2-ms ๆถ๏ผๅฏๅคไฝๆๅ
ณ้ญ่ฎพๅคใๅฏนไบ PM_FALSE๏ผๅบ็จ็กฌไปถ้ป่ฎค่ฎพ็ฝฎใ |
reset-type | ้ๆฉๅคไฝ็ฑปๅใ | UINT8 | โข PM_WARM_RESETโข PM_HARD_RESETโข PM_SHUTDOWN | WARM_RESET๏ผๅดฉๆบ่ฝฌๅจ๏ผHARD_RESET๏ผ้ๅฏ๏ผSHUTDOWN๏ผๅ ณๆบ |
s1-ms | ๆ้ฎๆ็ปญๆถ้ด๏ผ้ๆฉๆฏๆ็ๅผ๏ผใ | UINT32 | 0, 32, 56, 80, 128, 184, 272, 408, 608, 904, 1352, 2048, 3072, 4480, 6720, 10256 | RESIN_N_RESET_S1_TIMER๏ผๅไฝไธบๆฏซ็ง |
s2-ms | ๆ้ฎๆ็ปญๆถ้ด๏ผ้ๆฉๆฏๆ็ๅผ๏ผใ | UINT32 | 0, 10, 50, 100, 250, 500, 1000, 2000 | RESIN_N_RESET_S2_TIMER๏ผๅไฝไธบๆฏซ็ง |
s3-reset | ้ ็ฝฎ S3 ๅคไฝใ | Boolean | โข PM_TRUEโข PM_FALSE | ๅฝ S2 ๅคไฝๅคฑ่ดฅๆถ๏ผ็จไฝๆ ้ไฟๆคๅคไฝๆๅบๅๅคไฝใๅจ่ฎกๆถๅจๅฐๆๅ่งฆๅใ |
s3-src | ้ๆฉๅคไฝๆบใ | UINT8 | โข PM_PON_RESET_SOURCE_KPDPWRโข PM_PON_RESET_SOURCE_RESINโข PM_PON_RESET_SOURCE_RESIN_AND_KPDPWRโข PM_PON_RESET_SOURCE_RESIN_OR_KPDPWR | ็ตๆบ้ฎใresin ้ฎๆ็ปๅ |
timervalue-ms | S3 ๅคไฝ็ๆ้ฎๆ็ปญๆถ้ดใ | UINT32 | 0, 8, 16, 32, 63, 125, 240, 500, 1000, 2000, 4000, 8000, 16000, 32000, 64000, 128000 | RESET_S3_TIMER_n๏ผๅไฝไธบๆฏซ็ง |
uvlo-config | ้ ็ฝฎๆฌ ๅ้ๅฎ้ๅผใ | UINT8 | PMIC_A, PMIC_B, PMIC_C, PMIC_D, PMIC_E, PMIC_I, PMIC_K | ๅฝ่พพๅฐ UVLO ้ๅผๆถ๏ผ่ฎพๅคๅฐๅ ณๆบใ |
uvlo_thresh | UVLO ้ๅผใ | UINT32 | mV | ้ๅผ๏ผๅไฝไธบๆฏซไผ |
uvlo_hyst | UVLO ่ฟๆปใ | UINT32 | mV | ่ฟๆป๏ผๅไฝไธบๆฏซไผ |
uvlo_enable | ๅฏ็จ UVLO ้ ็ฝฎใ | Boolean | PM_ENABLE, PM_DISABLE | ๅฏนไบ PM_DISABLE๏ผๅบ็จ็กฌไปถ้ป่ฎค่ฎพ็ฝฎใ |
ovlo-config | ้ ็ฝฎ่ฟๅ้ๅฎ้ๅผใ | PMIC_INDEX | PMIC_AโPMIC_K | ๅฝ่พพๅฐ OVLO ้ๅผๆถ๏ผ่ฎพๅคๅฐๅ ณๆบใ |
ovlo_thresh | OVLO ้ๅผใ | โ | mV | ้ๅผ๏ผๅไฝไธบๆฏซไผ |
ovlo_hyst | OVLO ่ฟๆปใ | โ | mV | ่ฟๆป๏ผๅไฝไธบๆฏซไผ |
ovlo_enable | ๅฏ็จ OVLO ้ ็ฝฎใ | โ | PM_ENABLE, PM_DISABLE | ๅฏนไบ PM_DISABLE๏ผๅบ็จ็กฌไปถ้ป่ฎค่ฎพ็ฝฎใ |
Long-pwrkey-dbnc-chk | ๅฏๅจๆ้ด็็ตๆบ้ฎๅปๆๆฃๆฅใ | UINT32 | msec | ๅฆๆๅจๅปๆ็ชๅฃๅ ๆชๆไธๆ้ฎ๏ผ่ฎพๅคๅฐๅ ณๆบใ |
chk-at | ๆฃๆฅๆ้ฎ็้ถๆฎตใ | UINT8 | 0, 1, 2 | 0๏ผไธๆฃๆฅ๏ผ1๏ผXBL Loader๏ผ2๏ผXBL core (UEFI) |
sw-config | ๅจๅฏๅจๆ้ดไฟฎๆน LDOใSMPSใๆถ้ใGPIO ็ PMIC SW ้ ็ฝฎใ | UINT32 | PM_EVENT_LOG_LEVEL_* | ๆงๅถ UART ไธญ PON ๆฅๅฟ็่ฏฆ็ป็จๅบฆใ |
Charger | ๅ ็ตๅจ้ ็ฝฎ็ปใ | UINT32 | PMIC_D / PMIC_I | ไธปๅ ็ตๅจ PMIC ็ดขๅผใ |
no-batt-cfg-enable | ๅฏ็จๆ ็ตๆฑ ้ ็ฝฎใ | UINT8 | PM_TRUE, PM_FALSE | ๅฆๆๆชๆฃๆตๅฐ็ตๆฑ ๏ผ่ฎพๅคๅฐ่ชๅจๅฏๅจใ |
Secondary-charger-present | ๆ็คบๆฏๅฆๅญๅจ่พ ๅฉๅ ็ตๅจใ | UINT8 | PM_TRUE, PM_FALSE | ่พ ๅฉๅ ็ตๅจ่ฎพ็ฝฎใ |
SMPS/LDO/CLK ็คบไพไปฃ็
driver-post-init = <
// PM_SMPS_SET_AHC_HR PM_BUSID_0 PMIC_C PM_SMPS_1 0x57
// PM_SMPS_SET_ULS PM_BUSID_0 PMIC_F PM_SMPS_6 1375000 /*The Voltage is in microVolts*/
// PM_LDO_SET_ULS PM_BUSID_0 PMIC_F PM_SMPS_6 1375000 /*The Voltage is in microVolts*/
// PM_CLK_ENABLE PM_BUSID_0 PMIC_A PM_CLK_RF_1 PM_TRUE
// PM_SMPS_SET_VOLT PM_BUSID_0 PMIC_B PM_SMPS_1 1200
// PM_SMPS_SET_AHC PM_BUSID_0 PMIC_B PM_SMPS_1 PM_FALSE
// PM_LDO_SET_AHC PM_BUSID_0 PMIC_B PM_LDO_1 PM_FALSE
// PM_LDO_SET_VOLT PM_BUSID_0 PMIC_B PM_LDO_1 1200
// PM_LDO_SET_MODE PM_BUSID_0 PMIC_B PM_LDO_1 PM_SW_MODE_NPM
// PM_SMPS_SET_MODE PM_BUSID_0 PMIC_B PM_SMPS_1 PM_SW_MODE_NPM
// PM_SMPS_SET_PD_CTRL PM_BUSID_0 PMIC_B PM_SMPS_1 PM_TRUE
// PM_SMPS_SET_PIN_CTRL PM_BUSID_0 PMIC_B PM_SMPS_1 PM_TRUE
// PM_SMPS_SET_OCP_BROADCAST PM_BUSID_0 PMIC_B PM_SMPS_1 PM_TRUE
// PM_LDO_SET_PD_CTRL PM_BUSID_0 PMIC_B PM_LDO_1 PM_TRUE
// PM_LDO_SET_PIN_CTRL PM_BUSID_0 PMIC_B PM_LDO_1 PM_TRUE
// PM_LDO_SET_OCP_BROADCAST PM_BUSID_0 PMIC_B PM_LDO_1 PM_TRUE
// PM_CLK_DRV_STR PM_BUSID_0 PMIC_A PM_CLK_RF_1 3
// PM_SMPS_SET_ENABLE PM_BUSID_0 PMIC_B PM_SMPS_1 PM_TRUE
// PM_LDO_SET_ENABLE PM_BUSID_0 PMIC_B PM_LDO_1 PM_TRUE
// PM_SPMI_CLK_DATA_CFG PM_BUSID_0 PMIC_A 0x2 0x2 /*BUS_ID, PMIC_ID, CLK buff Config, DATA buff Config*/
PM_DELAY(10)
> ;