Documentation Index
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| Item | Details |
|---|---|
| Board | Q2390 / IQ2390 |
| MCU CPU | RISC-V SiFive E6 |
| OS | Zephyr RTOS 4.3.0 |
| Toolchain | SDLLVM Clang 21.1.4 |
| RAM | 3 MB total (all code and data loaded to RAM — no XIP flash) |
| Debug interface | Lauterbach T32 over RISC-V JTAG |
┌──────────────────────┐ ┌───────────────────────┐ ┌───────────────────────┐
│ │ │ │ │ │
│ 1. Model │ │ 2. TFLM Runtime │ │ 3. Flashing & │
│ Preparation │────────►│ Integration │────────►│ Validation │
│ │ │ │ │ │
├──────────────────────┤ ├───────────────────────┤ ├───────────────────────┤
│ • Build Keras CNN │ │ • Clone tflite-micro │ │ • adb push .mbn │
│ • Export int8 TFLite │ │ • Wire LLVM libc++ │ │ • Verify remoteproc │
│ • Quantize inputs │ │ • Create infer module │ │ state = running │
│ • Flatten with xxd │ │ • Wire main.c + CMake │ │ • T32: read latency │
│ │ │ • Build firmware │ │ (g_tfli_avg_us µs) │
└──────────────────────┘ └───────────────────────┘ └───────────────────────┘
HOST HOST ON-DEVICE
xxd step converts the model and input binary files produced in Phase 1 into C arrays (model_data.cpp, input_data.cpp) that are compiled directly into the firmware in Phase 2.
| Requirement | Purpose |
|---|---|
| Linux machine (Ubuntu 22.04) | Primary host environment — all build and model preparation steps run on Linux |
| Python 3.x | Model export and input generation for example application |
| MCU firmware workspace (already cloned, configured and compiled) | Compiling the Zephyr firmware |
xxd (standard Unix utility) | Flattening model and input binaries into C arrays |
adb (Android Debug Bridge) | Flashing firmware binaries to the Target Hardware |
| Lauterbach T32 software | Reading inference results and RAM console output over JTAG |
| Requirement | Purpose |
|---|---|
| Q2390 / IQ2390 board | The target MCU running the TFLM firmware. Make sure MCU is up and running |
| Lauterbach T32 JTAG probe | Connected to the board |
| USB connection to host | Required by adb for flashing firmware |
| Phase | Description |
|---|---|
| 1. Model Preparation | Build the reference 1D-CNN model, export to int8 TFLite, and produce MCU-ready C byte arrays |
| 2. TFLM Runtime Integration | Clone TFLM, wire the C++ toolchain, create the inference module, and register it in firmware |
| 3. Flashing and Validation | Flash firmware onto target, verify the LPAI subsystem is running, and read inference latency from T32 |