> ## Documentation Index
> Fetch the complete documentation index at: https://dragonwingdocs-staging.qualcomm.com/llms.txt
> Use this file to discover all available pages before exploring further.

# RTSS GPIO driver overview

The RTSS GPIO driver provides interfaces to configure, read input/output values, and write output values to a GPIO. A GPIO is configured as input/output or as a special function GPIO. The GPIO driver also supports receiving interrupts from GPIO. Interrupts are generated as level-triggered, rising-edge, falling-edge, or dual-edge-triggered interrupts.

Specific GPIOs are assigned to RTSS for data input activities and receiving interrupt request. Across all SoCs, the GPIO structure remains the same and consists of the following parameters:

* Direction
* Drive mode
* Drive strength
* Function select
* GPIO client APIs

## **Direction**

Sets the direction of the GPIO. A GPIO configured as an input is read only, while a GPIO configured as an output can be read and written.

## **Drive mode**

GPIOs are configured to have internal pull circuits (up, down, or no-pull) and different driving strengths. It sets the drive mode, which depends on how the pin is connected to the board.

Regardless of the FUNC SEL field setting, the pad is set up to use an internal weak pull-up, pull down, keeper, or no-pull function:

```text theme={null}
GPIO_NP = 0, /**<-- GPIO No Pull   >*/

GPIO_PD,     /**<-- GPIO Pull Down >*/

GPIO_KP,     /**<-- GPIO Keeper    >*/

GPIO_PU,     /**<-- GPIO Pull Up   >*/
```

## **Drive strength**

Drive strength controls the output voltage and impedance of the GPIO pad. Configuration is based on hardware design requirements. A higher value increases pin maximum frequency, energy consumption, and EMI generation. Also, dependent on external pull-up or pull-down strength, and line characteristics.

Drive strength can be:

```text theme={null}
GPIO_2MA = 0,    /**<-- GPIO Drive 2 MA  >*/

GPIO_4MA,       /**<-- GPIO Drive 4 MA  >*/

GPIO_6MA,       /**<-- GPIO Drive 6 MA  >*/

GPIO_10MA,      /**<-- GPIO Drive 10 MA  >*/

GPIO_8MA,       /**<-- GPIO Drive 8 MA  >*/

GPIO_14MA,      /**<-- GPIO Drive 14 MA  >*/

GPIO_16MA,      /**<-- GPIO Drive 16 MA  >*/

GPIO_12MA,      /**<-- GPIO Drive 12 MA  >*/
```

## **Function select**

It gives the ability to choose the module that’s routed to the GPIO pad. By default, this is set to the general purpose (function 0).

Examples of pin muxing options in IQ-8275 is RTSS \[48] used for CAN (func=0) or EMAC (func=1).

For more information about each GPIO pin assignment and alternate functions,

* See [QCS9075 + PMM8650AU Pin Assignment and GPIO Configuration Spreadsheet](https://docs.qualcomm.com/doc/80-73417-1A/80-73417-1A_REV_AC_QCS9075___PMM8650AU_Pin_Assignment_and_GPIO_Configuration_Spreadsheet.xlsm).
* See [QCS8275 + PMM8620AU Pin Assignment and GPIO Configuration Specification Spreadsheet](https://docs.qualcomm.com/doc/80-73475-1A/80-73475-1A_REV_AC_QCS8275___PMM8620AU_Pin_Assignment_and_GPIO_Configuration_Specification_Spreadsheet.xlsm).

## **GPIO client APIs**

### **sail\_gpio\_config\_pin (int ngpio, GPIOConfigType cfg)**

The `sail_gpio_config_pin()` function allows the clients to configure the GPIO for GPIO transaction calls.

The clients must register with the GPIO structure such as direction, drive mode, drive strength, and function selection.

* Prototype: `void sail_gpio_config_pin(int ngpio, GPIOConfigType *cfg);`
* Parameters:
  > | \<in> | ngpio | Number of the GPIO |
  > | :- | :- | :- |
  > | \<in> | cfg | Pointer to cfg structure |
* Returns: None

### `sail_gpio_config_group(int *ngpio, GPIOConfigType *cfg, uint8 nSize)`

Configures a group of GPIO’s pull, direction, drive strength, and function.

* Prototype: `void sail_gpio_config_group(int *ngpio, GPIOConfigType *cfg, uint8 nSize;`
* Parameters:
  > | \<in> | ngpio | Number of the GPIO |
  > | :- | :- | :- |
  > | \<in> | cfg | Pointer to cfg structure |
  > | \<in> | cfg | Size of the arrays ngpio and cfg |
* Returns: None

### **sail\_gpio\_ReadPin**

The Reading function reads the programmed output value of a GPIO pin.

* Prototype: `GPIOValueType sail_gpio_ReadPin (int ngpio);`
* Parameters:
  > | \<in> | ngpio | Number of the GPIO |
  > | :- | :- | :- |
* Returns:
  > * If the input is 1, returns GPIO\_HIGH
  > * If the input is 0, returns GPIO\_LOW

### **sail\_gpio\_WritePin**

Programs or writes the output value of a GPIO pin.

* Prototype: `GPIOValueType sail_gpio_ReadPin (int ngpio);`
* Parameters:
  > | \<in> | ngpio | Number of the GPIO |
  > | :- | :- | :- |
* Returns:
  > * If the input is 1, returns GPIO\_HIGH
  > * If the input is 0, returns GPIO\_LOW

### **vSailGPIOWakeUpConfig**

`vSailGPIOWakeUpConfig` is a GPIO configuration function dedicated to setting up specific GPIO pins on the wake-up input path of the SAIL power controller.

* Prototype: `static void vSailGPIOWakeUpConfig()`
* Parameters:
  > | \<in> | ngpio | Number of the GPIO |
  > | :- | :- | :- |
* Returns: None

For more information about wake-up-capable GPIOs,

* See [QCS9075 + PMM8650AU Pin Assignment and GPIO Configuration Spreadsheet](https://docs.qualcomm.com/doc/80-73417-1A/80-73417-1A_REV_AC_QCS9075___PMM8650AU_Pin_Assignment_and_GPIO_Configuration_Spreadsheet.xlsm).
* See [QCS8275 + PMM8620AU Pin Assignment and GPIO Configuration Specification Spreadsheet](https://docs.qualcomm.com/doc/80-73475-1A/80-73475-1A_REV_AC_QCS8275___PMM8620AU_Pin_Assignment_and_GPIO_Configuration_Specification_Spreadsheet.xlsm).

### **sail\_gpio\_ReadPinOutput**

Interface to read the output value of a GPIO.

* Prototype: `GPIOValueType sail_gpio_ReadPinOutput(int ngpio);`
* Parameters:
  > | \<in> | ngpio | Number of the GPIO |
  > | :- | :- | :- |
* Returns:
  * If the output is 1, returns GPIO\_HIGH
  * If the output is 0, returns GPIO\_LOW

## **Interrupt configuration**

The GPIO driver provides an interface to configure, enable, and trigger interrupts to read and clear the interrupt status. Before any GPIO interrupt is received, it’s configured and enabled at both the generic interrupt controller (GIC) and the top-level mode multiplexer (TLMM) hardware. The interrupt at GIC is enabled during the TLMM driver initialization as it’s not a GPIO-specific.

### **Direct connect**

The direct connect is designed to provide a low-latency interrupt to processors that are running at higher frequencies.

## **GPIO interrupt configuration APIs**

When necessary, clients calling uGPIOSummaryInt\_EnableInterrupt enable the interrupt at TLMM. The interrupt is first configured and then registered using the `uGPIOSummaryInt_RegisterInterrupt` functions.

### **uGPIOSummaryInt\_ConfigureInterrupt()**

It allows clients to set the interrupt trigger on the specified GPIO pin. The trigger is one of the following:

GPIO summery interrupt trigger types

| **Interrupt trigger types** | **Value** | **Desription** |
| :-: | :-: | :-: |
| `UGPIOINT_TRIGGER_HIGH` | 0x0 | The GPIO interrupt triggers only if the input signal is high. |
| `UGPIOINT_TRIGGER_LOW` | 0x1 | The GPIO interrupt triggers only if the input signal is low. |
| `UGPIOINT_TRIGGER_RISING` | 0x2 | The GPIO interrupt triggers only if the input signal level transitions from low to high. |
| `UGPIOINT_TRIGGER_FALLING` | 0x3 | The GPIO interrupt triggers only if the input signal level transitions from high to low. |
| `UGPIOINT_TRIGGER_DUAL_EDGE` | 0x4 | The GPIO interrupt triggers only if the input signal level transitions from high to low or from low to high. |

* Prototype: `static void uGPIOSummaryInt_ConfigureInterrupt(int nGPIO, int nTrigger, int nRawStatusEn, int nTargetProc);`
* Parameters:
  > | \<in> | ngpio | THe GPIO pin. |
  > | :- | :- | :- |
  > | \<in> | eTrigger | The interrupt trigger condition for which the client callback is registered. |
  > | \<in> | isr | The client ISR callback. |
  > | \<in> | Param | The client specified parameter to be provided to the client callback when the interrupt fires. |
* Returns: None

### **uGPIOSummaryInt\_RegisterInterrupt()**

It registers a GPIO interrupt at TLMM.

* Prototype: `int uGPIOSummaryInt_RegisterInterrupt( uint32 nGPIO, uGPIOIntTriggerType eTrigger, uGPIOINTISR isr, uGPIOINTISRCtx param);`
* Parameters:
  > | \<in> | ngpio | The GPIO pin. |
  > | :- | :- | :- |
  > | \<in> | eTrigger | The interrupt trigger condition for which the client callback is registered. |
  > | \<in> | isr | The client ISR callback. |
  > | \<in> | Param | The client-specified parameter provided to the client callback when the interrupt fires. |
* Returns:
  * UGPIOINT\_SUCCESS (0) - If the ISR registration is successful, this value is returned.
  * UGPIOINT\_ERROR (-1) - An Error if the uGPIOInt driver isn’t able to register the interrupt service routine (ISR).

### **uGPIOSummaryInt\_EnableInterrupt()**

It enables the interrupt at the interrupt controller for a specific GPIO.

* Prototype: `int uGPIOSummaryInt_EnableInterrupt( uint32 nGPIO);`
* Parameters:
  > | \<in> | ngpio | THe GPIO pin. |
  > | :- | :- | :- |
* Returns:
  * UGPIOINT\_SUCCESS (0) - If the ISR registration is successful, this value is returned.
  * UGPIOINT\_ERROR (-1) - An Error if the uGPIOInt driver isn’t able to register the interrupt service routine (ISR).

### **uGPIOSummaryInt\_DisableInterrupt()**

It disables the interrupt at the interrupt controller for a specific GPIO.

* Prototype: `int uGPIOSummaryInt_DisableInterrupt( uint32 nGPIO);`
* Parameters:
  > | \<in> | ngpio | THe GPIO pin. |
  > | :- | :- | :- |
* Returns:
  * UGPIOINT\_SUCCESS (0) - If the ISR registration is successful, this value is returned.
  * UGPIOINT\_ERROR (-1) - An Error if the uGPIOInt driver wasn’t able to register the interrupt service routine (ISR).

## **Verify GPIO driver**

For information about verifying the GPIO driver, see [gpio](https://docs.qualcomm.com/doc/80-70033-42/topic/test-commands.html#gpio).
